HL

Hsin-Chieh Lin

QC Quanta Computer: 18 patents #33 of 1,295Top 3%
VT Via Technologies: 8 patents #72 of 1,108Top 7%
NU National Chiao Tung University: 3 patents #170 of 1,517Top 15%
VS Via Optical Solution: 1 patents #7 of 18Top 40%
VE Vtc Electronics: 1 patents #4 of 6Top 70%
CS Chiun Mai Communication Systems: 1 patents #140 of 280Top 50%
EX ExxonMobil: 1 patents #5,661 of 10,161Top 60%
IT ITRI: 1 patents #5,197 of 9,619Top 55%
RP Regeneron Pharmaceuticals: 1 patents #552 of 810Top 70%
📍 Taoyuan, NY: #6 of 23 inventorsTop 30%
Overall (All Time): #91,755 of 4,157,543Top 3%
36
Patents All Time

Issued Patents All Time

Showing 26–36 of 36 patents

Patent #TitleCo-InventorsDate
7378095 Methods of treating type I diabetes by blocking VEGF-mediated activity Jingtai Cao, Li-Hsien Wang, Mark Sleeman, Stanley Wiegand 2008-05-27
7106235 Active hybrid circuit for a full duplex channel Ming-Chou Yen, Kun-Ying Tsai, Jui-Tai Ko, Chun-Wang Wei 2006-09-12
7016450 Clock recovery circuit and related methods Jyh-Fong Lin, Yi-Bin Hsieh 2006-03-21
6859027 Device and method for measuring jitter in phase locked loops Sung-Hung Li, Steven Su 2005-02-22
6856265 Data converter with background auto-zeroing via active interpolation Tai-Haur Kuo, Kuo-Hsin Chen, Jyh-Fong Lin 2005-02-15
6687320 Phase lock loop (PLL) clock generator with programmable skew and frequency You-Ming Chiu, Jiin Lai, Jyhfong Lin, Wei Wang 2004-02-03
6642866 Data converter with background auto-zeroing via active interpolation Tai-Haur Kuo, Kuo-Hsin Chen, Jyh-Fong Lin 2003-11-04
6400197 Delay device having a delay lock loop and method of calibration thereof Jiin Lai, Kuo-Ping Liu 2002-06-04
6292521 Phase lock device and method Jiin Lai, Fang CHEN 2001-09-18
6233528 Method and device for signal testing Jiin Lai, Jyhfong Lin 2001-05-15
6005426 Digital-type delay locked loop with expanded input locking range Jyhfong Lin 1999-12-21