Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11056210 | Electrical circuit comprising a trim circuit | Vivek Bhan, Hans Martin von Staudt | 2021-07-06 |
| 10135686 | Communication interface | Mark Eason, Hans Martin von Staudt | 2018-11-20 |
| 9316690 | Data recirculation in configured scan paths | Songlin Zuo | 2016-04-19 |
| 9024315 | Daisy chain connection for testing continuity in a semiconductor die | Hongjun Yao, Matthew Michael Nowak, Glen T. Kim, Mark C. Chan, Shiqun Gu | 2015-05-05 |
| 8420410 | Techniques providing fiducial markers for failure analysis | Xiangdong Pan, Foua Vang, Prayag Bhanubhai Patel, Donald D. Lyons, Martin Villafana | 2013-04-16 |
| 8384417 | Systems and methods utilizing redundancy in semiconductor chip interconnects | Karim Arabi, Tsvetomir Petrov Petrov | 2013-02-26 |
| 8159255 | Methodologies and tool set for IDDQ verification, debugging and failure diagnosis | Songlin Zuo, Hailong Cui, Xiangdong Pan, Triphuong Nguyen | 2012-04-17 |
| 7932736 | Integrated circuit with improved test capability via reduced pin count | Srinivas Varadarajan, Raghunath R. Bhattagiri, Arvid G. Sammuli | 2011-04-26 |
| 7750660 | Integrated circuit with improved test capability via reduced pin count | Srinivas Varadarajan, Raghunath R. Bhattagiri, Arvid G. Sammuli | 2010-07-06 |