Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10614007 | Providing interrupt service routine (ISR) prefetching in multicore processor-based systems | Raghavendra Srinivas, Siddesh Halavarthi Math Revana | 2020-04-07 |
| 10482016 | Providing private cache allocation for power-collapsed processor cores in processor-based systems | Siddesh Halavarthi Math Revana | 2019-11-19 |