| 11010681 |
Distributed computing system, and data transmission method and apparatus in distributed computing system |
Mingzhen Xia |
2021-05-18 |
| 9503928 |
Systems, methods and apparatus for adaptive persistent acknowledge priority control for bi-directional TCP throughput optimization |
Insung Kang, Shanshan Wang |
2016-11-22 |
| 7864815 |
Methods and apparatus for performing protocol data unit header re-synchronization in a communication system |
Chu-Ming Lin |
2011-01-04 |
| 7729322 |
HDLC hardware accelerator |
Nischal Abrol, Hanfang Pan, Simon Turner |
2010-06-01 |
| 7606266 |
HDLC hardware accelerator |
Nischal Abrol, Hanfang Pan, Simon Turner |
2009-10-20 |
| 7502911 |
Variable length instruction fetching that retrieves second instruction in dependence upon first instruction length |
Gilbert C. Sih, Qiuzhen Zou |
2009-03-10 |
| 7450959 |
Wireless multiprocessor system-on-chip with unified memory and fault inhibitor |
Nicholas Yu |
2008-11-11 |
| 6615341 |
Multiple-data bus architecture for a digital signal processor using variable-length instruction set with single instruction simultaneous control |
Gilbert C. Sih, Qiuzhen Zou, Inyup Kang, Quaeed Motiwala, Deepu John +6 more |
2003-09-02 |
| 6496920 |
Digital signal processor having multiple access registers |
Qiuzhen Zou, Gilbert C. Sih |
2002-12-17 |
