Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5136696 | High-performance pipelined central processor for predicting the occurrence of executing single-cycle instructions and multicycle instructions | Robert F. Beckwith, Suren Irukulla, Steven L. Schwartz, Nihar-Ranjan Mohapatra | 1992-08-04 |
| 4860197 | Branch cache system with instruction boundary determination independent of parcel boundary | Brian K. Langendorf | 1989-08-22 |