Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7185302 | Method for generating layouts by chamfering corners of polygons | John Curcio | 2007-02-27 |
| 7135750 | Photodiode array having reduced dead space | Noel Hoilien | 2006-11-14 |
| 7043711 | System and method for defining semiconductor device layout parameters | Gregory Michaelson, Joel Frederick Kluender | 2006-05-09 |
| 6747294 | Guard ring structure for reducing crosstalk and latch-up in integrated circuits | Sandhya Gupta, Steve Kosier | 2004-06-08 |