Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9798778 | System and method for dynamic growing of a patient database with cases demonstrating special characteristics | Ye Xu, Lilla Boroczky | 2017-10-24 |
| 9585259 | Apparatus and methods for placement of discrete components on internal printed circuit board layers | Boris Reynov, Oscar Diaz-Landa, Shreeram Siddhaye, Chebrolu S. Srinivas, Lee M. Forbes +1 more | 2017-02-28 |
| 9202783 | Selective antipad backdrilling for printed circuit boards | Joyce KITABAYASHI | 2015-12-01 |
| 9185794 | Apparatus and methods for placement of discrete components on internal printed circuit board layers | Boris Reynov, Oscar Diaz-Landa, Shreeram Siddhaye, Chebrolu S. Srinivas, Lee M. Forbes +1 more | 2015-11-10 |
| 8494871 | Decision support system for acute dynamic diseases | James David Schaffer, Nicolas Wadih Chbat, Nilanjana Banerjee, Yasser Alsafadi | 2013-07-23 |
| 7268046 | Dual gate oxide high-voltage semiconductor device and method for forming the same | Theodore Letavic | 2007-09-11 |
| 7113418 | Memory systems and methods | William L. Oberlin, Srinivas Venkataraman | 2006-09-26 |
| 6927103 | Method and apparatus of terminating a high voltage solid state device | Ted Letavic | 2005-08-09 |
| 6847081 | Dual gate oxide high-voltage semiconductor device | Theodore Letavic | 2005-01-25 |
| 6794719 | HV-SOI LDMOS device with integrated diode to improve reliability and avalanche ruggedness | John Petruzzello, Theodore Letavic | 2004-09-21 |
| 6642558 | Method and apparatus of terminating a high voltage solid state device | Ted Letavic | 2003-11-04 |
| 6468878 | SOI LDMOS structure with improved switching characteristics | John Petruzzello, Theodore Letavic | 2002-10-22 |
| 6414365 | Thin-layer silicon-on-insulator (SOI) high-voltage device structure | Ted Letavic | 2002-07-02 |
| 6362504 | Contoured nonvolatile memory cell | — | 2002-03-26 |
| 6346451 | Laterial thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode | Theodore Letavic | 2002-02-12 |
| 6313489 | Lateral thin-film silicon-on-insulator (SOI) device having a lateral drift region with a retrograde doping profile, and method of making such a device | Theodore Letavic, Richard Egloff, Andrew Mark Warwick | 2001-11-06 |
| 6314516 | Method and apparatus for configuring communications settings in a computer system | John M. Cagle, Mark R. Potter, Mohana R. Mullapudi, Wolfgang M. Neubauer | 2001-11-06 |
| 6310378 | High voltage thin film transistor with improved on-state characteristics and method for making same | Theodore Letavic, Emil Arnold | 2001-10-30 |
| 6232636 | Lateral thin-film silicon-on-insulator (SOI) device having multiple doping profile slopes in the drift region | Theodore Letavic | 2001-05-15 |
| 6221737 | Method of making semiconductor devices with graded top oxide and graded drift region | Theodore Letavic | 2001-04-24 |
| 6127703 | Lateral thin-film silicon-on-insulator (SOI) PMOS device having a drain extension region | Theodore Letavic | 2000-10-03 |
| 6028337 | Lateral thin-film silicon-on-insulator (SOI) device having lateral depletion means for depleting a portion of drift region | Theodore Letavic | 2000-02-22 |
| 6023090 | Lateral thin-film Silicon-On-Insulator (SOI) device having multiple zones in the drift region | Theodore Letavic | 2000-02-08 |
| 5969387 | Lateral thin-film SOI devices with graded top oxide and graded drift region | Theodore Letavic | 1999-10-19 |
| 5634006 | System and method for ensuring QOS in a token ring network utilizing an access regulator at each node for allocating frame size for plural transmitting applications based upon negotiated information and priority in the network | Mark Baugher, John K. Bigler | 1997-05-27 |