Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method to control paging subsystem processing in virtual memory data processing system during execution of critical code sections

Method to control paging subsystem processing in virtual memory data processing system during execution of critical code sections

US Patent RE36462 · Granted Dec 21, 1999

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Minimizing delay while migrating direct memory access (DMA) mapped pages2022
Scalable virtual memory metadata management2022
Hardware based mandatory access control2020
Memory stripe with selectable size2020
Thread interrupt offload re-prioritization2020
Method, system and apparatus for modifying a font character2019
Virtually addressable hardware global kernel segment table2019
Secure computer architecture2019
Off-line affinity-aware parallel zeroing of memory in non-uniform memory access 2019
Affinity aware parallel zeroing of memory in non-uniform memory access (NUMA) se2019
Thread interrupt offload re-prioritization2019
Affinity-aware parallel zeroing of memory for initialization of large pages in n2019