Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Dynamically optimizing bus frequency of an inter-integrated circuit (‘I2C’) bus

Dynamically optimizing bus frequency of an inter-integrated circuit (‘I2C’) bus

US Patent 9880607 · Granted Jan 30, 2018

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

High speed wireless data communication to solid state drive2023
Computing device expansion modules and control of their operation based on tempe2023
Computer having an embedded switch2022
Adjustment of voltage regulator firmware settings based upon an efficiency score2021
Storing data based on the physical accessibility of data storage devices2021
Adjustment of voltage regulator firmware settings based upon external factors2020
Computer having an embedded switch2020
Wireless enabled hard drive management2020
BMC coupled to an M.2 slot2020
Selection of a location for installation of a CPU in a compute node using predic2020
Selection of a default phase in a multiphase voltage regulator based on a wear s2020
Reconfigurable processors and methods for collecting computer program instructio2020