Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Circuits incorporating integrated passive devices having inductances in 3D configurations and stacked with corresponding dies

Circuits incorporating integrated passive devices having inductances in 3D configurations and stacked with corresponding dies

US Patent 9847291 · Granted Dec 19, 2017

Estimated economic value: $12,981,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Transformer structure2025
Low noise amplifier incorporating Sutardja transformer2025
Method and apparatus for using a storage system as main memory2025
Noise tolerant buffer2025
Ultra-low power D flip-flop with reduced clock load2025
Hash function with pre-scrambler2024
Fractional transformer2024
Method and apparatus for using a storage system as main memory2024
Transformer structure2023
Storage system and method for accessing same2023
Area efficient N-path filter2023
Integrated LC tank with third order harmonic trap2023