Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for reducing forming voltage in resistive random access memory

Method for reducing forming voltage in resistive random access memory

US Patent 9761800 · Granted Sep 12, 2017

Estimated economic value: $542,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method for forming a doped metal oxide for use in resistive switching memory ele2017
TiOx based selector element2016
Current selector for non-volatile memory in a cross bar array based on defect an2016
Diamond like carbon (DLC) as a thermal sink in a selector stack for non-volatile2016
Reduction of forming voltage in semiconductor devices2016
Selector device using low leakage dielectric MIMCAP diode2016
Photo-induced MSM stack2016
Methods for selective etching of a multi-layer substrate2016
Doped electrode for DRAM capacitor stack2016
Resistive switching layers including Hf-Al-O2016
Non-volatile resistive-switching memories2016
ALD processing techniques for forming non-volatile resistive switching memories2016