{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Circuits and methods for performance optimization of SRAM memory", "item": "https://www.patentleaderboard.com/patent/9734896"}]}
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Home › Circuits and methods for performance optimization of SRAM memory

Circuits and methods for performance optimization of SRAM memory

US Patent 9734896 · Granted Aug 15, 2017

Estimated economic value: $14,729,000 ⓘ

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