Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers

Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers

US Patent 9696379 · Granted Jul 4, 2017

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Using an ensemble of data transformers to encode data before zero-value compress2025
Managing power for serverless computing2025
Controlling speculative actions based on a hit/miss predictor2025
Detecting and mitigating false structure sharing within a cache line2025
Instruction execution scheduling using a hit/miss predictor2025
Location-aware protection system of latches (LAPS-L)2025
Safe execution of programs that make out-of-bounds references2025
Accelerator trustworthiness2024
Adaptive multi-agent cooperative computation and inference2024
Cache line compression prediction and adaptive compression2024
Voltage droop and overshoot management using non-linear slope detection2024
Dynamic guard band with timing protection and with performance protection2024