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Home › Implementing system irritator accelerator FPGA unit (AFU) residing behind a coherent attached processors interface (CAPI) unit

Implementing system irritator accelerator FPGA unit (AFU) residing behind a coherent attached processors interface (CAPI) unit

US Patent 9607120 · Granted Mar 28, 2017

Estimated economic value: $2,520,000 ⓘ

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