Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Mapping thread phases onto heterogeneous cores based on execution characteristics and cache line eviction counts

Mapping thread phases onto heterogeneous cores based on execution characteristics and cache line eviction counts

US Patent 9569270 · Granted Feb 14, 2017

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Cloud data backup storage manager2020
Traffic flow model to provide traffic flow information2018
Power management for processor2018
Telemetrics based location and tracking2017
Processor core clock rate selection2016
Processor core clock rate selection2016
Touch screen with tactile feedback2016
Cloud data backup storage manager2016
Operating system sandbox2016
Operating system sandbox2016
Data centers task mapping2016
Data centers task mapping2016