Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Bi-modal arbitration nodes for a low-latency adaptive asynchronous interconnection network and methods for using the same

Bi-modal arbitration nodes for a low-latency adaptive asynchronous interconnection network and methods for using the same

US Patent 9537679 · Granted Jan 3, 2017

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Systems, pipeline stages, and computer readable media for advanced asynchronous 2014
Asynchronous digital circuits including arbitration and routing primatives for a2014
Systems, pipeline stages, and computer readable media for advanced asynchronous 2014
Asynchronous digital circuits including arbitration and routing primitives for a2013
Methods and media for forming a bound network2010
Methods, media, and means for forming asynchronous logic networks2010
Low latency FIFO circuit for mixed clock systems2007
Circuits and methods for high-capacity asynchronous pipeline processing2006
Asynchronous pipeline with latch controllers2005
Circuits and methods for high-capacity asynchronous pipeline2005
Variable-length, high-speed asynchronous decoder circuit2005
Low latency FIFO circuits for mixed asynchronous and synchronous systems2005