Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Dynamic clock rate control for power reduction

Dynamic clock rate control for power reduction

US Patent 9467150 · Granted Oct 11, 2016

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Power target calibration for controlling drive-to-drive performance variations i2024
Clock recovery2023
Power target calibration for controlling drive-to-drive performance variations i2022
Integrated power and thermal management in non-volatile memory2021
Distributed power management for non-volatile memory controllers2020
Reactive power management for non-volatile memory controllers2019
Distributed power management for non-volatile memory controllers using average a2019
Dynamic clock rate control for power reduction2017
Non-linear image mapping2016
Timing in a circuit design having finite state machines2015
Direct synthesis of audio clock from a video clock via phase interpolation of a 2011
System and method for communicating digital display data and auxiliary processin2006