Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Circuit for mitigating write disturbance of dual-port SRAM

Circuit for mitigating write disturbance of dual-port SRAM

US Patent 9466357 · Granted Oct 11, 2016

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Hybrid TFET-MOSFET circuit design2016
Static memory cell2016
Static memory cell2016
Static memory cell2016
Control circuit of SRAM and operating method thereof2015
Control circuit of SRAM and operating method thereof2015
Methods and apparatus for varying a supply voltage or reference voltage using in2015
Failure alarm system and method of failure alarming thereof2015
Static random access memory apparatus and bit-line voltage controller thereof2014
Static random access memory apparatus and bit-line voltage controller thereof2014
Static memory and memory cell thereof2014
Static memory and memory cell thereof2014