Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Sideband logic for monitoring PCIe headers

Sideband logic for monitoring PCIe headers

US Patent 9274915 · Granted Mar 1, 2016

Estimated economic value: $57,907,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Address collision avoidance in a memory device2018
Address collision avoidance in a memory device2018
Methods and structure for accounting for connection resets between peripheral co2015
Methods and structure for accounting for connection resets between peripheral co2015
High throughput pipelined data path2011
Systems, methods, and computer program products for passively routing secure soc2011
Method and apparatus to align and standardize packet based parallel interfaces2010
Method for improving selection performance by using an arbitration elimination s2006
Method, apparatus, and program for improving data mirroring performance in a SCS2006
Pipeline SCSI nexus associativity circuit2006
Method for pre-emptive arbitration2006
Method and apparatus for improving queue traversal time2005