Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System and method for checking run-time consistency for sequentially and non-sequentially fetched instructions

System and method for checking run-time consistency for sequentially and non-sequentially fetched instructions

US Patent 9176739 · Granted Nov 3, 2015

Estimated economic value: $30,424,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Real time input/output address translation for virtualized systems2023
Real time input/output address translation for virtualized systems2021
Reconfigurable matrix multiplier system and method2020
Outer product multipler system and method2020
Reduced stack usage in a multithreaded processor2020
Command message generation and execution using a machine code-instruction2018
N-ary tree for mapping a virtual memory space2017
Bounded cache searches2016
Bounded cache searches2016
Rule-based virtual address translation for accessing data2016
Thread interleaving in a multithreaded embedded processor2012
Translation look-aside buffer with variable page sizes2012