Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Methods for fabricating FinFET integrated circuits using laser interference lithography techniques

Methods for fabricating FinFET integrated circuits using laser interference lithography techniques

US Patent 9123825 · Granted Sep 1, 2015

Estimated economic value: $963,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

IC structure with MFMIS memory cell and CMOS transistor2025
Structures for a ferroelectric field-effect transistor and related methods2024
Structure including a cross-bar router and method2024
Buried-channel low noise transistors and methods of making such devices2020
Transistor element with reduced lateral electrical field2020
Three-dimensional transistor with improved channel mobility2019
Transistor element including a buried insulating layer having enhanced functiona2019
Communicating optical signals between stacked dies2019
Communicating optical signals between stacked dies2019
Communicating optical signals between stacked dies2019
Flash memory device2019
Ferro-FET device with buried buffer/ferroelectric layer stack2018