Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Integrated circuit including transistor structure on depleted silicon-on-insulator, related method and design structure

Integrated circuit including transistor structure on depleted silicon-on-insulator, related method and design structure

US Patent 9041105 · Granted May 26, 2015

Estimated economic value: $2,909,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Bipolar transistor with stepped emitter2025
Transistors for radio-frequency circuits and devices2025
Transistor with wrap-around extrinsic base2024
Vertical bipolar junction transistor and method2024
Transistors with schottky barriers2024
Transistor with wrap-around extrinsic base2023
Transistor with wrap-around extrinsic base2023
Spot-size converters with angled facets2023
Transistors having reduced parasitics and enhanced performance2023
Optical antenna for photonic integrated circuit and methods to form same2023
Optical antenna with reflective material for photonic integrated circuit and met2023
Angled grating couplers with inclined side edge portions2023