Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Multithreaded, mixed-HDL/ESL concurrent fault simulator for large-scale integrated circuit designs

Multithreaded, mixed-HDL/ESL concurrent fault simulator for large-scale integrated circuit designs

US Patent 9032266 · Granted May 12, 2015

Assignee

No assignee recorded.

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Floodlight2022
Cavitary tissue ablation system2020
Race logic synthesis for ESL-based large-scale integrated circuit design2015
Race logic synthesis for large-scale integrated circuit designs2013
Racecheck: a race logic analyzer program for digital integrated circuits2010
RaceCheck: a race logic analyzer program for digital integrated circuits2008
Multithreaded, mixed hardware description languages logic simulation on engineer2002