Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Circuitry for parallel decoding of data blocks

Circuitry for parallel decoding of data blocks

US Patent 8875001 · Granted Oct 28, 2014

Estimated economic value: $10,620,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Hybrid architecture for LDPC channel coding in data center2019
Hybrid architecture for LDPC channel coding in data center2019
System and method for computing log likelihood ratios2018
Efficient low error-floor LDPC codes2017
Efficient low error-floor LDPC codes2017
Forward error correction2016
Matrix expansion2015
Method and system for forward error correction of interleaved-formated data2015
Parity check matrix2015
Minimum mean square error processing2015
Minimum mean square error processing2015
Minimum mean square error processing2015