Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Producing vertical transistor having reduced parasitic capacitance

Producing vertical transistor having reduced parasitic capacitance

US Patent 8865576 · Granted Oct 21, 2014

Estimated economic value: $893,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Facilitating formation of a via in a substrate2025
Processed inorganic wafer and processing wafer stack with abrasive process2024
Modular thin film deposition system2021
Modular thin film deposition system2021
Deposition system with modular deposition heads2019
Deposition system with repeating motion profile2019
Deposition system with repeating motion profile2019
Deposition system with interlocking deposition heads2019
Multiple TFTs on common vertical support element2018
Method for forming a thin-film transistor2017
Bottom-gate and top-gate VTFTs on common structure2017
TFT substrate with variable dielectric thickness2017