Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Algorithm and architecture for multi-argument associative operations that minimizes the number of components using a latency of the components

Algorithm and architecture for multi-argument associative operations that minimizes the number of components using a latency of the components

US Patent 8775147 · Granted Jul 8, 2014

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Memory efficient on-chip buffering for projective transformation2018
System and method for automatically generating a graphical model from a text-bas2018
System and method for transforming graphical models2017
Unified hardware and software debugging2016
Automatic comparison and performance analysis between different implementations2016
Automatic comparison and performance analysis between different implementations2016
Automatic comparison and performance analysis between different implementations2016
Minimum resource fast fourier transform2016
Verification harness for automatically generating a text-based representation of2015
Dynamic arbitrary data simulation using fixed resources2014
Dynamic arbitrary data simulation using fixed resources2014
Configurable enablement of operations associated with state enabled systems in a2014