Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Line and space architecture for a non-volatile memory device

Line and space architecture for a non-volatile memory device

US Patent 8765566 · Granted Jul 1, 2014

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Reduced diffusion in metal electrode for two-terminal memory2021
Semiconductor device for a non-volatile (NV) resistive memory and array structur2019
Recessed high voltage metal oxide semiconductor transistor for RRAM cell2018
Reduced diffusion in metal electrode for two-terminal memory2017
Sub-oxide interface layer for two-terminal memory2017
Resistive random access memory (RRAM) cell and method for forming the RRAM cell2017
Methods for fabricating resistive memory device switching material using ion imp2017
Mitigating damage from a chemical mechanical planarization process2016
Method for surface roughness reduction after silicon germanium thin film deposit2016
Scalable RRAM device architecture for a non-volatile memory device and method2016
Method for silver deposition for a non-volatile memory device2016
Electrode structure for a non-volatile memory device and method2016