Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Manufacturing method of a MOS transistor using a sidewall spacer

Manufacturing method of a MOS transistor using a sidewall spacer

US Patent 8741711 · Granted Jun 3, 2014

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Active area salicidation for NMOS and PMOS devices2025
Dislocation enhanced transistor device and method2025
DRAM circuitry and method of forming DRAM circuitry2024
Transistor antifuse, and related devices, systems, and methods2024
Display panel, liquid-crystal display device and drive method2015
Method of manufacturing semiconductor device including trench embedded with semi2015
Display device, and circuit and method for driving the same2013
Memory cell array, method of producing the same, and semiconductor memory device2010
Manufacturing method of semiconductor device suppressing short-channel effect2007
Manufacturing method of semiconductor device suppressing short-channel effect2007