Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory device having improved programming operation

Memory device having improved programming operation

US Patent 8705290 · Granted Apr 22, 2014

Estimated economic value: $11,465,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Self-optimizing corrective read offsets with lateral charge migration proxies2025
Program refresh with gate-induced drain leakage2025
Buffer allocation for reducing block transit penalty2025
Multiple-pass programming of memory cells using temporary parity generation2025
Temporary parity buffer allocation for zones in a parity group2025
Padding cached data with valid data for memory flush commands2025
Selectively programming retired wordlines of a memory device2025
3D NAND with inter-wordline airgap2025
Modified read counter incrementing scheme in a memory sub-system2025
Stack of horizontally extending and vertically overlapping features, methods of 2025
Corrective reads with improved recovery from data retention loss2025
Memory devices with backside bond pads under a memory array2025