Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Circuits and methods for efficient clock and data delay configuration for faster timing closure

Circuits and methods for efficient clock and data delay configuration for faster timing closure

US Patent 8595668 · Granted Nov 26, 2013

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method for large scale synthesis of optically stimulated luminescence grade poly2016
Methods and apparatus for reusing snoop responses and data phase results in a ca2015
Methods and apparatus for reusing snoop responses and data phase results in a bu2014
Multi-pass routing to reduce crosstalk2013