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Home › Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) having a ferroelectric capacitor aligned with a three dimensional transistor structure

Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) having a ferroelectric capacitor aligned with a three dimensional transistor structure

US Patent 8518792 · Granted Aug 27, 2013

Estimated economic value: $2,209,000 ⓘ

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