Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Timing signoff system and method that takes static and dynamic voltage drop into account

Timing signoff system and method that takes static and dynamic voltage drop into account

US Patent 8516424 · Granted Aug 20, 2013

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Charge pump with matched currents2016
Systems, circuitry, and methods for decoding pulse width modulated signal2016
Programmable slew rate power switch2014
Extraction tool and method for determining maximum and minimum stage delays asso2014
Method and apparatus of core timing prediction of core logic in the chip-level i2014
Implementing and checking electronic circuits with flexible ramptime limits and 2014
Characterizing performance of an electronic system2014
Circuit timing analysis incorporating the effects of temperature inversion2014
System and method for designing integrated circuits that employ adaptive voltage2013
Timing error sampling generator and a method of timing testing2013
Intelligent dummy metal fill process for integrated circuits2013
Implementing and checking electronic circuits with flexible ramptime limits and 2012