Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Error detection schemes for a cache in a data processing system

Error detection schemes for a cache in a data processing system

US Patent 8291305 · Granted Oct 16, 2012

Estimated economic value: $1,728,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Memory controller which implements partial writes with error signaling2025
Data processing system having cache memory debugging support and method therefor2022
Circuitry for checking operation of error correction code (ECC) circuitry2021
Data processing system having cache memory debugging support and method therefor2020
Configurable pipeline based on error detection mode in a data processing system2019
Watchdog method and device2019
Multi-channel DMA system with command queue structure supporting three DMA modes2019
Data processing system with speculative fetching2018
Data processing system with speculative fetching2018
Switching between traditional and history program trace modes without halting a 2018
Method to communicate task context information and device therefor2018
Selectively performing a single cycle write operation with ECC in a data process2018