Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Logic circuit delay optimization

Logic circuit delay optimization

US Patent 8225265 · Granted Jul 17, 2012

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Superconductive integrated circuit devices with on-chip testing2025
Switching of perpendicularly magnetized nanomagnets with spin-orbit torques in t2023
Switching of perpendicularly magnetized nanomagnets with spin-orbit torques in t2023
Distributed spintronic/CMOS sensor network for thermal aware systems2022
Methods and systems for using a light emitting diode to switch a device on and o2022
Energy efficient write scheme for non-volatile resistive crossbar arrays with se2021
Switching of perpendicularly magnetized nanomagnets with spin-orbit torques in t2021
Hybrid processor2021
Resistive address decoder and virtually addressed memory2020
Superconducting system architecture for high-performance energy-efficient cryoge2020
Memristor based multithreading2019
Switching of perpendicularly magnetized nanomagnets with spin-orbit torques in t2019