Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Methods of fabricating passive element without planarizing and related semiconductor device

Methods of fabricating passive element without planarizing and related semiconductor device

US Patent 8119491 · Granted Feb 21, 2012

Estimated economic value: $5,017,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Field effect transistor with shallow trench isolation features within source/dra2025
Heterojunction bipolar transistor with buried trap rich isolation region2025
High electron mobility transistors having barrier liners and integration schemes2025
Semiconductor devices with single-photon avalanche diodes and isolation structur2025
Contact-over-active-gate transistor structures with contacts landed on enlarged 2025
Edge seals for semiconductor packages2025
Heterojunction bipolar transistor with buried trap rich isolation region2024
Field effect transistor2024
IC structure including porous semiconductor layer in bulk substrate adjacent tre2024
Semiconductor devices with single-photon avalanche diodes and isolation structur2024
Semiconductor on insulator wafer with cavity structures2024
IC structure including porous semiconductor layer under trench isolation2024