Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Scalable flash EEPROM memory cell with floating gate spacer wrapped by control gate and method of manufacture

Scalable flash EEPROM memory cell with floating gate spacer wrapped by control gate and method of manufacture

US Patent 8119479 · Granted Feb 21, 2012

Estimated economic value: $707,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Metal mask having a plurality of strip-shaped structures2025
Display panel metal mask improvced quality standard detection and inspecting met2024
Smart power supply system and method thereof2020
FinFET device and fabrication method thereof2019
Semiconductor structure and fabrication method thereof2019
Method for forming contact holes in a semiconductor device2017
Apparatus for breaking line bidirectional current and control method thereof2017
Memory device2017
Mask and method for manufacturing semiconductor device2016
Semiconductor device, related manufacturing method, and related electronic devic2016
Memory device and method for forming the same2016
Apparatus for limiting current of line or breaking current, and control method t2016