Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Configurable clock network for programmable logic device

Configurable clock network for programmable logic device

US Patent 8072260 · Granted Dec 6, 2011

Estimated economic value: $16,090,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Systems for and methods for mode hop detection in heat assisted magnetic recordi2025
Systems for and methods for fast mode hop detection and correction for hard disk2024
Configurable clock network for programmable logic device2016
Configurable clock network for programmable logic device2016
Bit slip circuitry for serial data signals2015
Bit slip circuitry for serial data signals2014
Configurable clock network for programmable logic device2014
Configurable clock network for programmable logic device2014
Bit slip circuitry for serial data signals2013
Configurable clock network for programmable logic device2013
Configurable clock network for programmable logic device2013
Configurable clock network for programmable logic device2013