Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for detecting and correcting errors in a parallel to serial circuit

Method and apparatus for detecting and correcting errors in a parallel to serial circuit

US Patent 7971115 · Granted Jun 28, 2011

Estimated economic value: $7,917,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Memory write interface in an integrated circuit and method of providing same2013
Power distribution network2013
Testing an integrated circuit having configurable input/output terminals2011
Input/output block and operation thereof2011
Method and apparatus for testing a controlled impedance buffer2010
Regional signal-distribution network for an integrated circuit2009
Bimodal source synchronous interface2009
Regional signal-distribution network for an integrated circuit2008
High speed configurable transceiver architecture2007
Network physical layer with embedded multi-standard CRC generator2006
Multi-purpose source synchronous interface circuitry2006
Bimodal serial to parallel converter with bitslip controller2006