Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Dynamic frequency adjustment for interoperability of differential clock recovery methods

Dynamic frequency adjustment for interoperability of differential clock recovery methods

US Patent 7966510 · Granted Jun 21, 2011

Estimated economic value: $3,405,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Array type discrete decoupling under BGA grid2020
Digital serializer based pulsewidth modulator controller2016
Dual electrical compact small form-factor pluggable module2016
Increased connector port density via extending faceplate2014
Dynamic frequency adjustment for interoperability of differential clock recovery2012
Dynamic frequency adjustment for interoperability of differential clock recovery2012
Advanced clock distribution mechanism for circuit emulation applications2011
Advanced clock distribution mechanism for circuit emulation applications2011
Method and system for using a queuing device as a lossless stage in a network de2011
Optimized control plane signalling for a high availability network device in a c2009
Implementing a microprocessor boot configuration prom within an FPGA2009