Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Scheme to optimize scan chain ordering in designs

Scheme to optimize scan chain ordering in designs

US Patent 7721171 · Granted May 18, 2010

Estimated economic value: $4,666,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Executing a composite scalar-vector VLIW instruction having a repeat field2024
Current consumption controller2024
Enhanced low precision binary floating-point formatting2023
Sparse systolic array design2023
Reusing an operand received from a first-in-first-out (FIFO) buffer according to2023
Ultra-low precision floating-point fused multiply-accumulate unit2022
Reduced precision based programmable and SIMD dataflow architecture2022
Low latency floating-point division operations2022
Half-precision floating-point arrays at low overhead2022
Instruction initialization in a dataflow architecture2022
Facilitating data processing using SIMD reduction operations across SIMD lanes2022
Binary floating-point multiply and scale operation for compute-intensive numeric2021