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Home › Method of trimming a hard mask layer, method for fabricating a gate in a MOS transistor, and a stack for fabricating a gate in a MOS transistor

Method of trimming a hard mask layer, method for fabricating a gate in a MOS transistor, and a stack for fabricating a gate in a MOS transistor

US Patent 7592265 · Granted Sep 22, 2009

Estimated economic value: $5,557,000 ⓘ

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