Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Delay circuit for controlling a pre-charging time of bit lines of a memory cell array

Delay circuit for controlling a pre-charging time of bit lines of a memory cell array

US Patent 7586791 · Granted Sep 8, 2009

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor memory device for preventing occurrence of row hammer issue2020
Nonvolatile semiconductor memory device and method of reusing same2014
Non-volatile storage device2013
Non-volatile storage device2013
Asynchronous semiconductor memory capable of preventing coupling noise2013
Nonvolatile semiconductor memory and method of access evaluation to the same2012
Substrate voltage generating circuit with improved level shift circuit2009
Delay circuit having a correction circuit2009
Nonvolatile semiconductor memory2009
Electrically writable nonvolatile memory2008
Semiconductor integrated circuit2006
Power supply control system2001