Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Discrete-time convolution cycle reduction with programmable digital signal processor

Discrete-time convolution cycle reduction with programmable digital signal processor

US Patent 7580965 · Granted Aug 25, 2009

Estimated economic value: $16,156,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Modular building fire fighting simulator2025
Dynamically configurable memory system2013
Automatic DTS CD Versus CD-DA detection within a file system-based device2011
Feed forward method for NICAM decode2010
Audio effect rendering based on graphic polygons2009
Methods and apparatus to provide refresh for local out of range read requests to2009
Dynamic sound source and listener position based audio rendering2009
Load balanced interrupt handling in an embedded symmetric multiprocessor system2008
Embedded symmetric multiprocessor system with arbitration control of access to s2007
Software development tool with embedded cache analysis2006
Data synchronization hardware primitive in an embedded symmetrical multiprocesso2006
Embedded symmetric multiprocessor system debug2006