Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Single-event-effect tolerant SOI-based inverter, NAND element, NOR element, semiconductor memory device and data latch circuit

Single-event-effect tolerant SOI-based inverter, NAND element, NOR element, semiconductor memory device and data latch circuit

US Patent 7504850 · Granted Mar 17, 2009

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Single event upset-tolerant latch circuit and flip-flop circuit2021
Single event upset-tolerant latch circuit and flip-flop circuit2021
Semiconductor device and method of manufacturing semiconductor device2018
Semiconductor device and method of manufacturing semiconductor device2017
Single-event effect tolerant latch circuit and flip-flop circuit2009
Single-event effect tolerant latch circuit and flip-flop circuit2009
Single-event effect tolerant latch circuit and flip-flop circuit2009
Inverter, semiconductor logic circuit, static random access memory and data latc2008
Semiconductor device having an SEB voltage suitable for use in space2005