Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Providing input signal through a sample and hold circuit with reduced distortion

Providing input signal through a sample and hold circuit with reduced distortion

US Patent 7471222 · Granted Dec 30, 2008

Estimated economic value: $15,979,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Analog-to-digital converter (ADC) having linearization circuit with reconfigurab2025
Metastability error detection and BER improvement technique in pipelined ADCs2025
Voltage-to-delay converter2025
Methods and apparatus to improve performance of voltage to delay converters2025
Calibration in non-linear multi-stage delay-to-digital conversion circuits2025
Multi-point reference distribution circuit2025
Ultrasound transmit-receive switch with combined transmit-receive and return-to-2025
Methods and apparatus to convert analog voltages to delay signals2025
Noise-shaping of additive dither in analog-to-digital converters2025
Lookup table for non-linear systems2025
Multi-bit voltage-to-delay conversion in data converter circuitry2025
Differential voltage-to-delay converter with improved CMRR2024