Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Systems and methods for buffering data between a coherency cache controller and memory

Systems and methods for buffering data between a coherency cache controller and memory

US Patent 7392347 · Granted Jun 24, 2008

Estimated economic value: $19,880,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Memory controller connection to RAM using buffer interface2013
Memory controller connection to RAM using buffer interface2008
Partitioning data for error correction2007
System and method to change data window2007
System and method for signal synchronization based on plural clock signals2007
Bus interface module2006
Systems and methods of partitioning data to facilitate error correction2006
Systems and methods of routing data to facilitate error correction2006