Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Embedded test circuitry and a method for testing a semiconductor device for breakdown, wearout or failure

Embedded test circuitry and a method for testing a semiconductor device for breakdown, wearout or failure

US Patent 7332924 · Granted Feb 19, 2008

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Igniter position for a combustor of a gas turbine engine2018
Method of identifying and/or programming an integrated circuit2014
Breaking up long-channel field effect transistor into smaller segments for relia2014
Using entire area of chip in TDDB checking2014
Mitigation of detrimental breakdown of a high dielectric constant metal-insulato2014
Mitigation of detrimental breakdown of a high dielectric constant metal-insulato2014
Secure random number generator2013
High voltage tolerant input/output interface circuit2012
Semiconductor device and process for reducing damaging breakdown in gate dielect2012
Chip identification using top metal layer2012
Method for separating a semiconductor wafer into individual semiconductor dies u2012
High voltage tolerant metal-oxide-semiconductor device2012