Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method, circuit library and computer program product for implementing enhanced performance and reduced leakage current for ASIC designs

Method, circuit library and computer program product for implementing enhanced performance and reduced leakage current for ASIC designs

US Patent 7257781 · Granted Aug 14, 2007

Estimated economic value: $10,148,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Controlled leakage CMOS decoupling capacitor for application specific integrated2006
ASIC architecture for active-compensation of a programmable impedance I/O2005
Dual rail power supply sequence tolerant off-chip driver2003
Using thick-oxide CMOS devices to interface high voltage integrated circuits2003
CMOS state saving latch2002
5V-tolerant receiver for low voltage CMOS technologies2002
High voltage tolerant receivers2002
Two-supply protection circuit2002
Level shifting CMOS I/O buffer2001
Using thick-oxide CMOS devices to interface high voltage integrated circuits2001
Zero set-up high speed CMOS latched-receiver2000
Circuit for raising a minimum threshold of a signal detector1996