Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and program product for avoiding cache congestion by offsetting addresses while allocating memory

Method and program product for avoiding cache congestion by offsetting addresses while allocating memory

US Patent 7237084 · Granted Jun 26, 2007

Estimated economic value: $17,863,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Split mode addressing a persistent memory2022
Controlling error propagation due to fault in computing node of a distributed co2020
Reflective memory bridge for external computing nodes2020
Reflective memory bridge for external computing nodes2020
Fault tolerance for persistent main memory2019
Object storage device with probabilistic data structure2019
Controlling error propagation due to fault in computing node of a distributed co2018
Reflective memory bridge for external computing nodes2018
Reflective memory bridge for external computing nodes2018
Implementing coherency with reflective memory2017
Cache and method for cache bypass functionality2016
Managing workload distribution among computer systems based on intersection of t2016