Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for evaluating and debugging assertions

Method and apparatus for evaluating and debugging assertions

US Patent 7143373 · Granted Nov 28, 2006

Estimated economic value: $20,656,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Using a serial profiler to estimate the performance of a parallel circuit simula2012
Feature tracking using a dense feature array2001
Adaptive modeling and segmentation of visual image streams2000
Computer system for authoring a multimedia composition using a visual representa1999
Icon for a display screen1998
Icon for a display screen1998
Icon for a display screen1998
Method and apparatus for compressing and analyzing video and for creating a refe1997
Method and apparatus for detecting timing errors in digital circuit designs1995